Difference between revisions of "MRI lab: FPGA controller documentation"
From Course Wiki
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|5:4 | |5:4 | ||
|00 = adc input (normal operation); 01 = adc test signal (count); 10 = test mode (DAC output); 11 = test mode (constant 0xDEADBEEF) | |00 = adc input (normal operation); 01 = adc test signal (count); 10 = test mode (DAC output); 11 = test mode (constant 0xDEADBEEF) | ||
| + | | | ||
| + | |- | ||
| + | |ADC gate enable | ||
| + | |3 | ||
| + | |0 = enable; 1 = disable (always valid) | ||
| | | | ||
|} | |} | ||
==API== | ==API== | ||
Revision as of 02:02, 18 June 2010
Control registers
| Register | Bits | Function | device |
|---|---|---|---|
| PhaseIncrement | 31:0 | Frequency of generated sinewave | /dev/pio_phaseIncrement |
| Pulse1On | 31:0 | Length of first pulse | /dev/pio_pulse1On |
| Pulse1Off | 31:0 | Interval between first and second pulse | /dev/pio_pulse1Off |
| Pulse2On | 31:0 | Length of second pulse | /dev/pio_pulse2On |
| Pulse2On | 31:0 | Interval between second pulse and end of cycle | /dev/pio_pulse2Off |
| PulseControl | /dev/pio_pulse2On | ||
| ADC DMA source | 5:4 | 00 = adc input (normal operation); 01 = adc test signal (count); 10 = test mode (DAC output); 11 = test mode (constant 0xDEADBEEF) | |
| ADC gate enable | 3 | 0 = enable; 1 = disable (always valid) |
